jesd_raw2axi_interface HDL Worker

Detail

HDL implementation of jesd_raw2axi_interface device worker in support of the n310 platform. This device worker maps RAW properties to AXI registers for the Analog Device JESD204B Framework cores implemented within the adrv9371_jesd_2tx_2rx device worker.

Worker Properties

• max_addr: Max address in the register map for raw properties.

  • Type: ushort

  • Access:

    • Parameter: True

    • Writable: False

    • Initial: False

    • Volatile: False

    • Read back: False

  • Default value: None

• tpl_tx_raw: Raw property interface for the JESD Tx Transport Layer.

  • Type: ulong

    • Array dimensions: ['320']

  • Access:

    • Parameter: False

    • Writable: True

    • Initial: False

    • Volatile: True

    • Read back: False

  • Default value: None

• link_tx_raw: Raw property interface for the JESD Tx Link Layer.

  • Type: ulong

    • Array dimensions: ['320']

  • Access:

    • Parameter: False

    • Writable: True

    • Initial: False

    • Volatile: True

    • Read back: False

  • Default value: None

• tpl_rx_raw: Raw property interface for the JESD Rx Transport Layer.

  • Type: ulong

    • Array dimensions: ['320']

  • Access:

    • Parameter: False

    • Writable: True

    • Initial: False

    • Volatile: True

    • Read back: False

  • Default value: None

• link_rx_raw: Raw property interface for the JESD Rx Link Layer.

  • Type: ulong

    • Array dimensions: ['320']

  • Access:

    • Parameter: False

    • Writable: True

    • Initial: False

    • Volatile: True

    • Read back: False

  • Default value: None

• clk_rx_raw: Raw property interface for the JESD Rx Clock Generator.

  • Type: ulong

    • Array dimensions: ['320']

  • Access:

    • Parameter: False

    • Writable: True

    • Initial: False

    • Volatile: True

    • Read back: False

  • Default value: None

• clk_tx_raw: Raw property interface for the JESD Tx Clock Generator.

  • Type: ulong

    • Array dimensions: ['320']

  • Access:

    • Parameter: False

    • Writable: True

    • Initial: False

    • Volatile: True

    • Read back: False

  • Default value: None

• phy_rx_raw: Raw property interface for the JESD Rx Physical Layer.

  • Type: ulong

    • Array dimensions: ['320']

  • Access:

    • Parameter: False

    • Writable: True

    • Initial: False

    • Volatile: True

    • Read back: False

  • Default value: None

• phy_tx_raw: Raw property interface for the JESD Tx Physical Layer.

  • Type: ulong

    • Array dimensions: ['320']

  • Access:

    • Parameter: False

    • Writable: True

    • Initial: False

    • Volatile: True

    • Read back: False

  • Default value: None

Worker Ports

Interfaces:

• tx_event: Transmitter Event Trigger.

• clk_rx_axi: AXI-Lite Interface for JESD Rx Clock Generator.

• clk_tx_axi: AXI-Lite Interface for JESD Tx Clock Generator.

• tpl_tx_axi: AXI-Lite Interface for JESD Tx Transport Layer.

• tpl_rx_axi: AXI-Lite Interface for JESD Rx Transport Layer.

• link_tx_axi: AXI-Lite Interface for JESD Tx Link Layer.

• link_rx_axi: AXI-Lite Interface for JESD Rx Link Layer.

• phy_tx_axi: AXI-Lite Interface for JESD Tx Physical Layer.

• phy_rx_axi: AXI-Lite Interface for JESD Rx Physical Layer.

Subdevice Connections:

• Supported device worker: adrv9371_jesd_2tx_2rx

  
  

  Connections:

  
  

  • Subdevice port: axi_rx_adxcvr

  • Supported worker port: phy_rx_axi

    • Index: None

  
  

  • Subdevice port: axi_tx_adxcvr

  • Supported worker port: phy_tx_axi

    • Index: None

  
  

  • Subdevice port: axi_rx_clkgen

  • Supported worker port: clk_rx_axi

    • Index: None

  
  

  • Subdevice port: axi_tx_clkgen

  • Supported worker port: clk_tx_axi

    • Index: None

  
  

  • Subdevice port: axi_rx_jesd

  • Supported worker port: link_rx_axi

    • Index: None

  
  

  • Subdevice port: axi_tx_jesd

  • Supported worker port: link_tx_axi

    • Index: None

  
  

  • Subdevice port: axi_rx_tpl

  • Supported worker port: tpl_rx_axi

    • Index: None

  
  

  • Subdevice port: axi_tx_tpl

  • Supported worker port: tpl_tx_axi

    • Index: None