N310 GPIO Interface (`n310_gpio`)

GPIO interface to the Master CPLD Controller for setting the ATR Registers. The ATR Registers are used to enable or disable the AD9371 RF Channels and other platform configuration settings. Individual control lines are implemented for the respective channels: CPLD-ATR-TX0, CPLD-ATR-TX1, CPLD-ATR-RX0, and CPLD-ATR-RX1.

Design

Interface

<ComponentSpec>
  <property name='DB_Select' type='bool' writable= 'true' description='Daughterboard (DB) Selection: ``0`` or ``false`` = DBA, ``1`` or ``true`` = DBB'/>
  <property name='Chip_Select' type='uchar' writable='true' description='DSA Selection: ``00`` = CPLD-ATR-TX0, ``01`` = CPLD-ATR-TX1, ``10`` = CPLD-ATR-RX0, ``11`` = CPLD-ATR-RX1'/>
  <property name='Set' type='bool' writable='true' default='false' description='Set Value'/>
</ComponentSpec>

Properties

DB_Select: Daughterboard (DB) Selection: 0 or false = DBA, 1 or true = DBB.
- Type: bool
- Access:
  - Parameter: False
  - Writable: True
  - Initial: False
  - Volatile: False
- Default value: None
Chip_Select: DSA Selection: 00 = CPLD-ATR-TX0, 01 = CPLD-ATR-TX1, 10 = CPLD-ATR-RX0, 11 = CPLD-ATR-RX1.
- Type: uchar
- Access:
  - Parameter: False
  - Writable: True
  - Initial: False
  - Volatile: False
- Default value: None
Set: Set Value.
- Type: bool
- Access:
  - Parameter: False
  - Writable: True
  - Initial: False
  - Volatile: False
- Default value: false

Implementations

n310_gpio (HDL)

Dependencies

There is also a dependency on:

ieee.std_logic_1164

ieee.numeric_std

Limitations

Limitations of n310_gpio are:

NONE

N310 GPIO Interface (n310_gpio)