sink HDL Worker

Detail

To avoid back-pressure when using the HDL implementation, the width of the sink component’s input port should match the width of the output port it is connecting to. For example, to terminate an output port using the bool_timed_sample protocol, the sink.hdl worker should be used with the bit_width parameter set to 8, while to terminate an output port using the complex_short_timed_sample protocol, the worker should be used with the bit_width parameter set to 32.

Worker Properties

• bit_width: Defines the width of the Stream interface of this worker. Should be a multiple of 8.

  • Type: ulong

  • Access:

    • Parameter: True

    • Writable: False

    • Initial: False

    • Volatile: False

    • Read back: False

  • Default value: None

Worker Ports

Inputs:

• input

  • Protocol: None

  • Optional: False

Utilisation

Utilization reporting is not currently implemented.