Timestamper (timestamper)
Prepends complex IQ data input with a timestamp.
timestamper is an asset in the ocpi.assets.util_comps component library.
Implementations include the timestamper HDL Worker (timestamper.hdl).
Tested platforms include
alst4, e3xx, isim, matchstiq-z1 (PL), ml605, modelsim, xsim, and zed.
Design
Inputs complex IQ data and outputs complex IQ data prepended with a timestamp. One timestamp is sent for each data message produced on the output.
A block diagram representation of the implementation is given in Figure 5:
Figure 5: Timestamper Block Diagram
Timestamps are provided as an input to the component on the time interface. The timestamp is a 64-bit number with the first 32 bits corresponding to seconds and the last 32 bits corresponding to fractional seconds. When a valid message is detected on the input, the timestamp is registered by the component and given on the output interface. Timestamps and data are given on the output interface using different opcodes.
The time interface from which the timestamps are generated originates from the OpenCPI time server, which is instanced as part of the platform worker. Furthermore, an additional component (time client) is dynamically instanced by the framework for all components that declare time interfaces. The time client communicates with the time server and produces the time interface seen by the component.
A timing diagram of the output interface for the timestamper component is given in Figure 6:
Figure 6: Timestamper Output Timing Diagram
Interface
<!-- This is the spec file (OCS) for: timestamper
Add component spec attributes, like "protocol".
Add property elements for spec properties.
Add port elements for i/o ports -->
<ComponentSpec>
<Property Name="enable" Type="bool" Initial="true" Default="true"/>
<Port Name="in" Producer="false" Protocol="iqstream_protocol.xml"/>
<Port Name="out" Producer="true" Protocol="iqstream_with_sync_protocol.xml"/>
</ComponentSpec>
Properties
enableType:
boolAccess:
Parameter:
FalseWritable:
FalseInitial:
TrueVolatile:
False
Default value:
true
Ports
Inputs:
in: Signed complex samples.Protocol:
iqstream_protocol.xmlOptional:
False
Outputs:
out: Signed complex samples with timestamps.Protocol:
iqstream_with_sync_protocol.xmlOptional:
False
Implementations
timestamper(HDL)Application worker HDL implementation with a settable runtime configuration parameter for the
enableproperty.
Example Application
<?xml version="1.0"?>
<application done="file_write">
<instance component="ocpi.core.file_read" connect="timestamper">
<property name="filename" value="input.bin"/>
</instance>
<instance component="ocpi.assets.util_comps.timestamper" connect="file_write">
</instance>
<instance component="ocpi.core.file_write">
<property name="filename" value="output.bin"/>
</instance>
</application>
Dependencies
The dependencies to other elements in OpenCPI are:
None.
Limitations
Limitations of timestamper are:
None.
Testing
Two test cases are implemented to validate the timestamper component:
Bypass mode
Normal mode
For both test cases, the input file is a series of eight ramps with 32-bit values ranging from 0 to 512.
For the bypass mode test case, the input data is forwarded to the output port. For verification, the output file is byte-wise compared to the input file.
For the normal mode test case, the expected output waveform is the identical ramp with timestamps inserted before each data message. For verification, the timestamps are extracted and checked for incrementing values.
Tested platforms: None
Component testing not completed.