On Wed, Apr 1, 2020 at 12:19 PM Davis Hoover <dhoover_at_geontech.com> wrote:
> No apology necessary. Hopefully we can clear this all up.
>
> The hardware delay values are read by software and then used to
> populate the initialization struct.
>
> For some new FPGA/card scenario, one has to pick a delay value to
> start with, and there's no way of knowing whether this value will work
> until you build the first bitstream and observe its timing report.
> After that initial "guess", totally agreed that guess and check is not
> ideal.
>
> There are indeed 64k theoretical configurations, but in practice, only
> on the order of 10-100 will ever be needed. For a new platform or a
> new card, it's at most 1 additional combo. Once you find the combo of
> values that works for you, please submit a merge request for any
> additions to ad9361_data_sub-build.xml.
>
Is it possible to reference the ad9361_data_sub component out of tree and
build that component just for me, or do I need to modify OpenCPI itself?
If not, could this be a feature enhancement where I define new build
configurations I need of core components without having to touch OpenCPI
itself?
>
> So one creates/selects values in ad9361_data_sub-build.xml, enforce
> use of those values in platform config/container XML and in the
> constraints file. The paradigm we chose was build-time customization
> instead of run-time.
>
Roger that. I found this script in the ad9361_adc_test and I am wondering
if this does a runtime modification, or if it thinks it does but really
doesn't?
https://gitlab.com/opencpi/opencpi/-/blob/b3ce4a1390f3c81579e1b16746a5b9ad0c199639/projects/assets/applications/ad9361_adc_test/scripts/AD9361_BIST_PRBS_delays.sh
Thanks,
Brian
Received on Wed Apr 01 2020 - 16:41:34 CDT