CRC Validation (crc_validator_uc)
CRC (Cyclic Redundancy Check) validation.
Design
The Cyclic Redundancy Check (CRC) is an error-detecting code derived from polynomial division. A common divisor, known as the CRC key, is selected to generate the code by the sender and used by the receiver to determine if a data packet arrived error free. The remainder of the polynomial division is the check value.
The user may specify a CRC Key size and value but for the ADS-B application, the CRC key consists of 25 bits (1) resulting in a 24-bit CRC value.
The resulting CRC value is sent along with the data in the packet as shown in Figure 17:.
Figure 17: Data packet with CRC.
At the receiver, the long division is repeated using the same common divisor CRC key but keeps the tail bit check value in the dividend. If the derived remainder is zero, then it is determined that there are no error bits.
Once the component determines that there are no error bits in the received packet, the component will send the packet unmodified with the CRC to the output port. If errors are detected, the full packet will be discarded.
The following examples are simple illustrations of the derivation of the check value and use in error detection.
Derive CRC
Figure 18: Derive CRC using polynomial division.
Check Errors
Figure 19: Check CRC using polynomial division.
Interface
<?xml version="1.0"?>
<componentspec>
<port name="input" protocol="uchar_timed_sample-prot"/>
<port name="output" producer="true" protocol="uchar_timed_sample-prot"/>
<property Name="crcKey" parameter="true" type="long" default="33551369"
description="Polynomial Value for the CRC Key"/>
<property name="crcBits" parameter="true" type="long" default="24"
description="Number of bits for the CRC Polynomial"/>
</componentspec>
Opcode Handling
This component does not support opcode processing or forwarding other than samples.
Properties
crcKey: Polynomial Value for the CRC Key.Type:
longAccess:
Parameter:
TrueWritable:
FalseInitial:
FalseVolatile:
False
Default value:
33551369
crcBits: Number of bits for the CRC Polynomial.Type:
longAccess:
Parameter:
TrueWritable:
FalseInitial:
FalseVolatile:
False
Default value:
24
Ports
Inputs:
input: Primary input samples port.Protocol:
uchar_timed_sample-protOptional:
False
Outputs:
output: Primary output samples port.Protocol:
uchar_timed_sample-protOptional:
False
Implementations
crc_validator_uc(HDL)
Example Application
<?xml version="1.0"?>
<application done="file_write">
<instance component="ocpi.core.file_read" connect="crc_validator_uc">
<property name="filename" value="input.bin"/>
</instance>
<instance component="ocpi.examples.components.crc_validator_uc" connect="file_write">
<!-- Skeleton application outline, set properties here. Or change this
example application to do something more real-world appropriate if
file-read, then component, then file-write is too artifical to be a
useful example. -->
</instance>
<instance component="ocpi.core.file_write">
<property name="filename" value="output.bin"/>
</instance>
</application>
Dependencies
The dependencies to other elements in OpenCPI are:
None
There is also a dependency on:
ieee.std_logic_1164
ieee.numeric_std
Limitations
Limitations of crc_validator_uc are:
Input and output packet size is currently specified as a parameter at run-time.
Testing
Tested platforms: None