data_sink HDL Worker
Detail
HDL implementation of a Xilinx Integrated Logic Analyzer (ILA) for the data port.
Worker Ports
inProtocol:
iqstreamOptional:
False
Inputs:
data_sink HDL WorkerHDL implementation of a Xilinx Integrated Logic Analyzer (ILA) for the data port.
Inputs:
in
Protocol: iqstream
Optional: False