data_sink_qdac HDL Device Worker
HDL device worker that provides functionality common to all DAC device types.
Detail
The data sink Quadratic Digital-to-Analog-Converter (QDAC) HDL device worker implements the data sink Quadratic Digital-to-Analog-Converter (QDAC) component specification, which provides the properties and ports that are necessary for this HDL device worker to implement the functionality that is common to all Digital-to-Analog Converter (DAC) device types. This functionality includes:
Interpreting input messages indicating end of data and finishing on end-of-file (EOF)
Normalizing input data to the bit width of the device
Providing an underrun indicator when the rate of input data is less than the DAC data rate
The data sink QDAC HDL device worker implementation is intended to be paired with
an HDL subdevice worker that translates the dev interface
to a device-specific interface.
A block diagram representation of the HDL device worker implementation is given in Figure 1:
Figure 1: Data Sink QDAC HDL Device Worker Block Diagram
Note
In the figure above, “WSI” refers to the Worker Streaming Interface, which is described in the OpenCPI HDL Development Guide.
Be sure to check the samp_count_before_first_underrun and num_underruns component properties
at the end of an application run because they are not stable until then. The worker does not use
clock domain crossing (cdc) HDL primitive library circuits
for these properties because it takes
advantage of the fact that they will have a stable value by the time the OpenCPI control
plane reads them at the end of an application run.
For component properties implemented by this HDL device worker, see $OCPI_ROOT_DIR/projects/platform/hdl/devices/specs/data_sink_qadc-spec.xml.
Worker Properties
IN_PORT_DATA_WIDTHType:
ulongAccess:
Parameter:
TrueWritable:
FalseInitial:
FalseVolatile:
FalseRead back:
False
Default value:
None
unused_opcode_detected_stickyType:
boolAccess:
Parameter:
FalseWritable:
FalseInitial:
FalseVolatile:
TrueRead back:
False
Default value:
None
clr_unused_opcode_detected_stickyType:
boolAccess:
Parameter:
FalseWritable:
TrueInitial:
FalseVolatile:
FalseRead back:
False
Default value:
None
dac_clk_freq_hzType:
floatAccess:
Parameter:
TrueWritable:
FalseInitial:
FalseVolatile:
FalseRead back:
False
Default value:
None
statusType:
ushortAccess:
Parameter:
FalseWritable:
FalseInitial:
FalseVolatile:
TrueRead back:
False
Default value:
None
ctl_countType:
ulongAccess:
Parameter:
FalseWritable:
FalseInitial:
FalseVolatile:
TrueRead back:
False
Default value:
None
dac_countType:
ulongAccess:
Parameter:
FalseWritable:
FalseInitial:
FalseVolatile:
TrueRead back:
False
Default value:
None
ocpi_buffer_size_on_offType:
ushortAccess:
Parameter:
FalseWritable:
FalseInitial:
TrueVolatile:
FalseRead back:
False
Default value:
0
ocpi_blocked_on_offType:
ulongAccess:
Parameter:
FalseWritable:
FalseInitial:
FalseVolatile:
TrueRead back:
False
Default value:
None
ocpi_max_latency_on_offType:
ushortAccess:
Parameter:
TrueWritable:
FalseInitial:
FalseVolatile:
FalseRead back:
False
Default value:
None
ocpi_latency_on_offType:
ushortAccess:
Parameter:
FalseWritable:
FalseInitial:
FalseVolatile:
TrueRead back:
False
Default value:
None
ocpi_messages_on_offType:
ulongAccess:
Parameter:
FalseWritable:
FalseInitial:
FalseVolatile:
TrueRead back:
False
Default value:
None
ocpi_bytes_on_offType:
ulongAccess:
Parameter:
FalseWritable:
FalseInitial:
FalseVolatile:
TrueRead back:
False
Default value:
None
Worker Ports
in: Size defined byIN_PORT_DATA_WIDTH.Protocol:
ComplexShortWithMetadataOptional:
False
on_off: See the OpenCPI HDL Development Guide for instructions on calculating the default value.Protocol:
tx_eventOptional:
True
dev
Inputs:
Outputs:
Interfaces: