convolutional_deinterleaver_us HDL worker
Implementation of a convolutional de-interleaver.
Detail
The convolutional de-interleaver worker uses shift registers to implement the delay lines. The shift registers were written to infer an SRL.
The worker allows for setting a port_data_width parameter property to define the widths of the input and output ports.
- References:
Worker Properties
port_data_width: Input and output port width.Type:
ucharAccess:
Parameter:
TrueWritable:
FalseInitial:
FalseVolatile:
FalseRead back:
False
Default value:
16
bit_width: Bit width of input/output data and bit width of the delay line shift registers. If N is less than or equal to the port width, this value should be less than or equal to N. If N is greater than the port width, this value should be less than or equal to the port width.Type:
ucharAccess:
Parameter:
TrueWritable:
FalseInitial:
FalseVolatile:
FalseRead back:
False
Default value:
12
Worker Ports
inputType:
streaminterfaceData width:
port_data_widthProtocol:
ushort_timed_sample-protOptional:
False
outputType:
streaminterfaceData width:
port_data_widthProtocol:
ushort_timed_sample-protOptional:
False
Inputs:
Outputs:
Worker ports
Inputs:
input: Size defined byport_data_width.Type:
StreamInterfaceProtocol:
ushort_timed_sample-protClockDirection:
inData width:
port_data_width
Outputs:
output: Size defined byport_data_widthType:
StreamInterfaceProtocol:
ushort_timed_sample-protWorker EOF:
falseInsertEOM:
trueClock:
inputData width:
port_data_width